[LoongArch] Always emit symbol-based relocations regardless of relaxation #153943
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@llvm/pr-subscribers-debuginfo @llvm/pr-subscribers-backend-loongarch Author: ZhaoQi (zhaoqi5) ChangesThis commit changes all relocations to be relocated with symbols. Without this commit, errors may occur in some cases, such as when using Some tests updated. Full diff: https://github.com/llvm/llvm-project/pull/153943.diff 11 Files Affected:
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index ca5d27d54bb81..c1e89e1311bba 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -498,8 +498,7 @@ bool LoongArchAsmBackend::addReloc(const MCFragment &F, const MCFixup &Fixup,
std::unique_ptr<MCObjectTargetWriter>
LoongArchAsmBackend::createObjectTargetWriter() const {
- return createLoongArchELFObjectWriter(
- OSABI, Is64Bit, STI.hasFeature(LoongArch::FeatureRelax));
+ return createLoongArchELFObjectWriter(OSABI, Is64Bit);
}
MCAsmBackend *llvm::createLoongArchAsmBackend(const Target &T,
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
index 7e021e486836a..7d5456555045b 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
@@ -21,26 +21,23 @@ using namespace llvm;
namespace {
class LoongArchELFObjectWriter : public MCELFObjectTargetWriter {
public:
- LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit, bool EnableRelax);
+ LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit);
~LoongArchELFObjectWriter() override;
bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override {
- return EnableRelax;
+ return true;
}
protected:
unsigned getRelocType(const MCFixup &, const MCValue &,
bool IsPCRel) const override;
- bool EnableRelax;
};
} // end namespace
-LoongArchELFObjectWriter::LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit,
- bool EnableRelax)
+LoongArchELFObjectWriter::LoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit)
: MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_LOONGARCH,
- /*HasRelocationAddend=*/true),
- EnableRelax(EnableRelax) {}
+ /*HasRelocationAddend=*/true) {}
LoongArchELFObjectWriter::~LoongArchELFObjectWriter() {}
@@ -103,6 +100,6 @@ unsigned LoongArchELFObjectWriter::getRelocType(const MCFixup &Fixup,
}
std::unique_ptr<MCObjectTargetWriter>
-llvm::createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit, bool Relax) {
- return std::make_unique<LoongArchELFObjectWriter>(OSABI, Is64Bit, Relax);
+llvm::createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit) {
+ return std::make_unique<LoongArchELFObjectWriter>(OSABI, Is64Bit);
}
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
index bb05baa9b717c..ab35a0096c8a2 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
@@ -36,7 +36,7 @@ MCAsmBackend *createLoongArchAsmBackend(const Target &T,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectTargetWriter>
-createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit, bool Relax);
+createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit);
} // end namespace llvm
diff --git a/llvm/test/CodeGen/LoongArch/linker-relaxation.ll b/llvm/test/CodeGen/LoongArch/linker-relaxation.ll
index 2827a95547903..0b0c5f317028a 100644
--- a/llvm/test/CodeGen/LoongArch/linker-relaxation.ll
+++ b/llvm/test/CodeGen/LoongArch/linker-relaxation.ll
@@ -1,6 +1,6 @@
; RUN: llc --mtriple=loongarch64 --filetype=obj -mattr=-relax \
; RUN: --relocation-model=pic --code-model=medium < %s \
-; RUN: | llvm-readobj -r - | FileCheck --check-prefixes=CHECK-RELOC,PCALA-RELOC %s
+; RUN: | llvm-readobj -r - | FileCheck --check-prefix=CHECK-RELOC %s
; RUN: llc --mtriple=loongarch64 --filetype=obj -mattr=+relax \
; RUN: --relocation-model=pic --code-model=medium < %s \
; RUN: | llvm-readobj -r - | FileCheck --check-prefixes=CHECK-RELOC,RELAX %s
@@ -35,10 +35,8 @@ define ptr @caller() nounwind {
; RELAX-NEXT: R_LARCH_RELAX - 0x0
; CHECK-RELOC-NEXT: R_LARCH_GOT_PC_LO12 g_e 0x0
; RELAX-NEXT: R_LARCH_RELAX - 0x0
-; PCALA-RELOC: R_LARCH_PCALA_HI20 .bss 0x0
-; RELAX-NEXT: R_LARCH_PCALA_HI20 g_i 0x0
-; PCALA-RELOC: R_LARCH_PCALA_LO12 .bss 0x0
-; RELAX-NEXT: R_LARCH_PCALA_LO12 g_i 0x0
+; CHECK-RELOC-NEXT: R_LARCH_PCALA_HI20 g_i 0x0
+; CHECK-RELOC-NEXT: R_LARCH_PCALA_LO12 g_i 0x0
; CHECK-RELOC: R_LARCH_TLS_GD_PC_HI20 t_un 0x0
; RELAX-NEXT: R_LARCH_RELAX - 0x0
; CHECK-RELOC-NEXT: R_LARCH_GOT_PC_LO12 t_un 0x0
@@ -83,11 +81,9 @@ define ptr @caller() nounwind {
; RELAX-NEXT: R_LARCH_RELAX - 0x0
; CHECK-RELOC-NEXT: R_LARCH_CALL36 callee3 0x0
; RELAX-NEXT: R_LARCH_RELAX - 0x0
-; PCALA-RELOC: R_LARCH_PCALA_HI20 .data 0x0
-; RELAX-NEXT: R_LARCH_PCALA_HI20 g_i1 0x0
+; CHECK-RELOC-NEXT: R_LARCH_PCALA_HI20 g_i1 0x0
; RELAX-NEXT: R_LARCH_RELAX - 0x0
-; PCALA-RELOC: R_LARCH_PCALA_LO12 .data 0x0
-; RELAX-NEXT: R_LARCH_PCALA_LO12 g_i1 0x0
+; CHECK-RELOC-NEXT: R_LARCH_PCALA_LO12 g_i1 0x0
; RELAX-NEXT: R_LARCH_RELAX - 0x0
%a = load volatile i32, ptr @g_e
%b = load volatile i32, ptr @g_i
diff --git a/llvm/test/CodeGen/LoongArch/xray-attribute-instrumentation.ll b/llvm/test/CodeGen/LoongArch/xray-attribute-instrumentation.ll
index 8999c20387003..7838bcea1025d 100644
--- a/llvm/test/CodeGen/LoongArch/xray-attribute-instrumentation.ll
+++ b/llvm/test/CodeGen/LoongArch/xray-attribute-instrumentation.ll
@@ -43,14 +43,14 @@ define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always"
; CHECK-NEXT: .dword 2
; RELOC: Section ([[#]]) .relaxray_instr_map {
-; RELOC-NEXT: 0x0 R_LARCH_64_PCREL .text 0x0
-; RELOC-NEXT: 0x8 R_LARCH_64_PCREL .text 0x0
-; RELOC-NEXT: 0x20 R_LARCH_64_PCREL .text 0x34
-; RELOC-NEXT: 0x28 R_LARCH_64_PCREL .text 0x0
+; RELOC-NEXT: 0x0 R_LARCH_64_PCREL .L{{.*}} 0x0
+; RELOC-NEXT: 0x8 R_LARCH_64_PCREL .L{{.*}} 0x0
+; RELOC-NEXT: 0x20 R_LARCH_64_PCREL .L{{.*}} 0x0
+; RELOC-NEXT: 0x28 R_LARCH_64_PCREL .L{{.*}} 0x0
; RELOC-NEXT: }
; RELOC-NEXT: Section ([[#]]) .relaxray_fn_idx {
-; RELOC-NEXT: 0x0 R_LARCH_64_PCREL xray_instr_map 0x0
+; RELOC-NEXT: 0x0 R_LARCH_64_PCREL .Lxray_sleds_start0 0x0
; RELOC-NEXT: }
; RELOC-NEXT: Section ([[#]]) .rela.eh_frame {
-; RELOC-NEXT: 0x1C R_LARCH_32_PCREL .text 0x0
+; RELOC-NEXT: 0x1C R_LARCH_32_PCREL .L{{.*}} 0x0
; RELOC-NEXT: }
diff --git a/llvm/test/MC/LoongArch/Misc/cfi-advance.s b/llvm/test/MC/LoongArch/Misc/cfi-advance.s
index 38eba7caf6106..037eb8ffeda1b 100644
--- a/llvm/test/MC/LoongArch/Misc/cfi-advance.s
+++ b/llvm/test/MC/LoongArch/Misc/cfi-advance.s
@@ -6,7 +6,7 @@
# RELOC: Relocations [
# RELOC-NEXT: .rela.eh_frame {
-# RELOC-NEXT: 0x1C R_LARCH_32_PCREL .text 0x0
+# RELOC-NEXT: 0x1C R_LARCH_32_PCREL .L{{.*}} 0x0
# RELOC-NEXT: }
# RELOC-NEXT: ]
# DWARFDUMP: DW_CFA_advance_loc: 4
diff --git a/llvm/test/MC/LoongArch/Relocations/fde-reloc.s b/llvm/test/MC/LoongArch/Relocations/fde-reloc.s
index ab911d1853a87..3b9f4003950f8 100644
--- a/llvm/test/MC/LoongArch/Relocations/fde-reloc.s
+++ b/llvm/test/MC/LoongArch/Relocations/fde-reloc.s
@@ -1,7 +1,7 @@
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=-relax < %s \
# RUN: | llvm-readobj -r - | FileCheck %s
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=+relax < %s \
-# RUN: | llvm-readobj -r - | FileCheck %s --check-prefix=RELAX
+# RUN: | llvm-readobj -r - | FileCheck %s
## Ensure that the eh_frame records the symbolic difference with
## the R_LARCH_32_PCREL relocation.
@@ -11,9 +11,6 @@ func:
ret
.cfi_endproc
-# CHECK: Section (4) .rela.eh_frame {
-# CHECK-NEXT: 0x1C R_LARCH_32_PCREL .text 0x0
+# CHECK: Section ({{.*}}) .rela.eh_frame {
+# CHECK-NEXT: 0x1C R_LARCH_32_PCREL .L{{.*}} 0x0
# CHECK-NEXT: }
-# RELAX: Section ({{.*}}) .rela.eh_frame {
-# RELAX-NEXT: 0x1C R_LARCH_32_PCREL .L{{.*}} 0x0
-# RELAX-NEXT: }
diff --git a/llvm/test/MC/LoongArch/Relocations/relax-addsub.s b/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
index f2524b29d230b..c02de7ecebf85 100644
--- a/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
+++ b/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
@@ -5,18 +5,18 @@
# NORELAX: Relocations [
# NORELAX-NEXT: Section ({{.*}}) .rela.text {
-# NORELAX-NEXT: 0x10 R_LARCH_PCALA_HI20 .text 0x0
-# NORELAX-NEXT: 0x14 R_LARCH_PCALA_LO12 .text 0x0
+# NORELAX-NEXT: 0x10 R_LARCH_PCALA_HI20 .L1 0x0
+# NORELAX-NEXT: 0x14 R_LARCH_PCALA_LO12 .L1 0x0
# NORELAX-NEXT: }
# NORELAX-NEXT: Section ({{.*}}) .rela.data {
# NORELAX-NEXT: 0x30 R_LARCH_ADD8 foo 0x0
-# NORELAX-NEXT: 0x30 R_LARCH_SUB8 .text 0x10
+# NORELAX-NEXT: 0x30 R_LARCH_SUB8 .L3 0x0
# NORELAX-NEXT: 0x31 R_LARCH_ADD16 foo 0x0
-# NORELAX-NEXT: 0x31 R_LARCH_SUB16 .text 0x10
+# NORELAX-NEXT: 0x31 R_LARCH_SUB16 .L3 0x0
# NORELAX-NEXT: 0x33 R_LARCH_ADD32 foo 0x0
-# NORELAX-NEXT: 0x33 R_LARCH_SUB32 .text 0x10
+# NORELAX-NEXT: 0x33 R_LARCH_SUB32 .L3 0x0
# NORELAX-NEXT: 0x37 R_LARCH_ADD64 foo 0x0
-# NORELAX-NEXT: 0x37 R_LARCH_SUB64 .text 0x10
+# NORELAX-NEXT: 0x37 R_LARCH_SUB64 .L3 0x0
# NORELAX-NEXT: }
# NORELAX-NEXT: ]
diff --git a/llvm/test/MC/LoongArch/Relocations/relax-attr.s b/llvm/test/MC/LoongArch/Relocations/relax-attr.s
index b1e648d850bb9..1abfc5655092b 100644
--- a/llvm/test/MC/LoongArch/Relocations/relax-attr.s
+++ b/llvm/test/MC/LoongArch/Relocations/relax-attr.s
@@ -5,7 +5,7 @@
# CHECK: Relocations [
# CHECK-NEXT: Section ({{.*}}) .rela.data {
-# CHECK-NEXT: 0x0 R_LARCH_64 .text 0x4
+# CHECK-NEXT: 0x0 R_LARCH_64 .L1 0x0
# CHECK-NEXT: }
# CHECK-NEXT: ]
diff --git a/llvm/test/MC/LoongArch/Relocations/relocation-specifier.s b/llvm/test/MC/LoongArch/Relocations/relocation-specifier.s
index d0898aaab92fe..c2526a6ecd701 100644
--- a/llvm/test/MC/LoongArch/Relocations/relocation-specifier.s
+++ b/llvm/test/MC/LoongArch/Relocations/relocation-specifier.s
@@ -6,10 +6,10 @@
## This test is similar to test/MC/CSKY/relocation-specifier.s.
# RELOC32: '.rela.data'
-# RELOC32: R_LARCH_32 00000000 .data + 0
+# RELOC32: R_LARCH_32 00000000 local
# RELOC64: '.rela.data'
-# RELOC64: R_LARCH_32 0000000000000000 .data + 0
+# RELOC64: R_LARCH_32 0000000000000000 local
# CHECK: TLS GLOBAL DEFAULT UND gd
# CHECK: TLS GLOBAL DEFAULT UND ld
diff --git a/llvm/test/MC/LoongArch/Relocations/sub-expr.s b/llvm/test/MC/LoongArch/Relocations/sub-expr.s
index 8bf046acc6975..fc61b7a4206fd 100644
--- a/llvm/test/MC/LoongArch/Relocations/sub-expr.s
+++ b/llvm/test/MC/LoongArch/Relocations/sub-expr.s
@@ -1,75 +1,54 @@
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=-relax %s \
-# RUN: | llvm-readobj -r - | FileCheck %s
+# RUN: | llvm-readobj -r - | FileCheck %s --check-prefixes=CHECK,NORELAX
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=+relax %s \
-# RUN: | llvm-readobj -r - | FileCheck %s --check-prefix=RELAX
+# RUN: | llvm-readobj -r - | FileCheck %s --check-prefixes=CHECK,RELAX
## Check that subtraction expressions emit R_LARCH_32_PCREL and R_LARCH_64_PCREL relocations.
## TODO: 1- or 2-byte data relocations are not supported for now.
-# CHECK: Relocations [
-# CHECK-NEXT: Section ({{.*}}) .rela.sx {
-# CHECK-NEXT: 0x4 R_LARCH_PCALA_HI20 z 0x0
-# CHECK-NEXT: 0x8 R_LARCH_PCALA_LO12 z 0x0
-# CHECK-NEXT: 0xC R_LARCH_32_PCREL .sy 0xC
-# CHECK-NEXT: }
+# CHECK: Relocations [
+# NORELAX-NEXT: Section ({{.*}}) .rela.sx {
+# NORELAX-NEXT: 0x4 R_LARCH_PCALA_HI20 z 0x0
+# NORELAX-NEXT: 0x8 R_LARCH_PCALA_LO12 z 0x0
+# NORELAX-NEXT: 0xC R_LARCH_32_PCREL y 0x8
+# NORELAX-NEXT: }
+# RELAX-NEXT: Section ({{.*}}) .rela.sx {
+# RELAX-NEXT: 0x4 R_LARCH_PCALA_HI20 z 0x0
+# RELAX-NEXT: 0x4 R_LARCH_RELAX - 0x0
+# RELAX-NEXT: 0x8 R_LARCH_PCALA_LO12 z 0x0
+# RELAX-NEXT: 0x8 R_LARCH_RELAX - 0x0
+# RELAX-NEXT: 0xC R_LARCH_ADD32 y 0x0
+# RELAX-NEXT: 0xC R_LARCH_SUB32 x 0x0
+# RELAX-NEXT: }
# CHECK-NEXT: Section ({{.*}}) .rela.data {
-# CHECK-NEXT: 0x0 R_LARCH_64_PCREL .sx 0x4
-# CHECK-NEXT: 0x8 R_LARCH_64_PCREL .sy 0x4
-# CHECK-NEXT: 0x10 R_LARCH_32_PCREL .sx 0x4
-# CHECK-NEXT: 0x14 R_LARCH_32_PCREL .sy 0x4
-# CHECK-NEXT: 0x18 R_LARCH_ADD64 .sx 0x4
-# CHECK-NEXT: 0x18 R_LARCH_SUB64 .sy 0x4
-# CHECK-NEXT: 0x20 R_LARCH_ADD64 .sy 0x4
-# CHECK-NEXT: 0x20 R_LARCH_SUB64 .sx 0x4
-# CHECK-NEXT: 0x28 R_LARCH_ADD32 .sx 0x4
-# CHECK-NEXT: 0x28 R_LARCH_SUB32 .sy 0x4
-# CHECK-NEXT: 0x2C R_LARCH_ADD32 .sy 0x4
-# CHECK-NEXT: 0x2C R_LARCH_SUB32 .sx 0x4
-# CHECK-NEXT: 0x30 R_LARCH_ADD64 .data 0x30
-# CHECK-NEXT: 0x30 R_LARCH_SUB64 .sx 0x4
-# CHECK-NEXT: 0x38 R_LARCH_ADD32 .data 0x38
-# CHECK-NEXT: 0x38 R_LARCH_SUB32 .sy 0x4
-# CHECK-NEXT: }
-# CHECK-NEXT: Section ({{.*}}) .rela.sy {
-# CHECK-NEXT: 0x10 R_LARCH_32_PCREL .sx 0x10
+# CHECK-NEXT: 0x0 R_LARCH_64_PCREL x 0x0
+# CHECK-NEXT: 0x8 R_LARCH_64_PCREL y 0x0
+# CHECK-NEXT: 0x10 R_LARCH_32_PCREL x 0x0
+# CHECK-NEXT: 0x14 R_LARCH_32_PCREL y 0x0
+# CHECK-NEXT: 0x18 R_LARCH_ADD64 x 0x0
+# CHECK-NEXT: 0x18 R_LARCH_SUB64 y 0x0
+# CHECK-NEXT: 0x20 R_LARCH_ADD64 y 0x0
+# CHECK-NEXT: 0x20 R_LARCH_SUB64 x 0x0
+# CHECK-NEXT: 0x28 R_LARCH_ADD32 x 0x0
+# CHECK-NEXT: 0x28 R_LARCH_SUB32 y 0x0
+# CHECK-NEXT: 0x2C R_LARCH_ADD32 y 0x0
+# CHECK-NEXT: 0x2C R_LARCH_SUB32 x 0x0
+# CHECK-NEXT: 0x30 R_LARCH_ADD64 {{.*}} 0x0
+# CHECK-NEXT: 0x30 R_LARCH_SUB64 x 0x0
+# CHECK-NEXT: 0x38 R_LARCH_ADD32 {{.*}} 0x0
+# CHECK-NEXT: 0x38 R_LARCH_SUB32 y 0x0
# CHECK-NEXT: }
+# NORELAX-NEXT: Section ({{.*}}) .rela.sy {
+# NORELAX-NEXT: 0x10 R_LARCH_32_PCREL x 0xC
+# NORELAX-NEXT: }
+# RELAX-NEXT: Section ({{.*}}) .rela.sy {
+# RELAX-NEXT: 0x4 R_LARCH_ALIGN - 0xC
+# RELAX-NEXT: 0x10 R_LARCH_ADD32 x 0x0
+# RELAX-NEXT: 0x10 R_LARCH_SUB32 y 0x0
+# RELAX-NEXT: }
# CHECK-NEXT: ]
-# RELAX: Relocations [
-# RELAX-NEXT: Section ({{.*}}) .rela.sx {
-# RELAX-NEXT: 0x4 R_LARCH_PCALA_HI20 z 0x0
-# RELAX-NEXT: 0x4 R_LARCH_RELAX - 0x0
-# RELAX-NEXT: 0x8 R_LARCH_PCALA_LO12 z 0x0
-# RELAX-NEXT: 0x8 R_LARCH_RELAX - 0x0
-# RELAX-NEXT: 0xC R_LARCH_ADD32 y 0x0
-# RELAX-NEXT: 0xC R_LARCH_SUB32 x 0x0
-# RELAX-NEXT: }
-# RELAX-NEXT: Section ({{.*}}) .rela.data {
-# RELAX-NEXT: 0x0 R_LARCH_64_PCREL x 0x0
-# RELAX-NEXT: 0x8 R_LARCH_64_PCREL y 0x0
-# RELAX-NEXT: 0x10 R_LARCH_32_PCREL x 0x0
-# RELAX-NEXT: 0x14 R_LARCH_32_PCREL y 0x0
-# RELAX-NEXT: 0x18 R_LARCH_ADD64 x 0x0
-# RELAX-NEXT: 0x18 R_LARCH_SUB64 y 0x0
-# RELAX-NEXT: 0x20 R_LARCH_ADD64 y 0x0
-# RELAX-NEXT: 0x20 R_LARCH_SUB64 x 0x0
-# RELAX-NEXT: 0x28 R_LARCH_ADD32 x 0x0
-# RELAX-NEXT: 0x28 R_LARCH_SUB32 y 0x0
-# RELAX-NEXT: 0x2C R_LARCH_ADD32 y 0x0
-# RELAX-NEXT: 0x2C R_LARCH_SUB32 x 0x0
-# RELAX-NEXT: 0x30 R_LARCH_ADD64 {{.*}} 0x0
-# RELAX-NEXT: 0x30 R_LARCH_SUB64 x 0x0
-# RELAX-NEXT: 0x38 R_LARCH_ADD32 {{.*}} 0x0
-# RELAX-NEXT: 0x38 R_LARCH_SUB32 y 0x0
-# RELAX-NEXT: }
-# RELAX-NEXT: Section ({{.*}}) .rela.sy {
-# RELAX-NEXT: 0x4 R_LARCH_ALIGN - 0xC
-# RELAX-NEXT: 0x10 R_LARCH_ADD32 x 0x0
-# RELAX-NEXT: 0x10 R_LARCH_SUB32 y 0x0
-# RELAX-NEXT: }
-# RELAX-NEXT: ]
-
.section .sx,"ax"
nop
x:
|
SixWeining
approved these changes
Aug 18, 2025
…tion This commit changes all relocations to be relocated with symbols. Without this commit, errors may occur in some cases, such as when using `llc`, `lto+relax`, or combining relaxed and norelaxed object files using `ld -r`. Some tests updated.
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This commit changes all relocations to be relocated with symbols.
Without this commit, errors may occur in some cases, such as when using
llc/lto+relax, or combining relaxed and norelaxed object files usingld -r.Some tests updated.